Luceda Photonics IPKISS Design Suite 2026.03: PIC Design Platform
IPKISS 2026.03 is Luceda Photonics’ latest release of its Python-based design platform for photonic integrated circuits (PICs), introducing a native DRC engine, advanced dummy filling, SPICE-based circuit simulation, and improved visual placement & routing assistance .
Key New Features in 2026.03
Luceda DRC (Native Design Rule Check)
A new native DRC engine integrated directly into the platform, designed to verify PIC layouts for foundry compliance during the design phase rather than at tape-out .
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Integrated Workflows: Run checks directly within the Layout Visualizer for immediate feedback, or use Python scripting for automated GDSII-based regression testing .
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Rule & Cell Selection: Filter by rule groups (metal layers, density, acute angles) and run checks on the full design or specific subcells for faster targeted verification .
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Multi-threaded Execution: Speeds up checks on large-scale layouts while maintaining control over system resources .
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Standardized Output: Generates
.lyrdbmarker files for inspection in tools like KLayout .
Advanced Dummy Filling (i3.Filler)
Enhanced dummy filling functionality provides greater flexibility for tape-out preparation .
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Simultaneous Multi-Layer Support: Perform dummy filling on different layers simultaneously with independent settings per layer .
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Secondary Fill Step: Execute a secondary dummy fill on an already-filled layout using different settings or geometries .
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Dual Application: Apply to IPKISS Layout views during design (
i3.dummy_fill_layout) or post-process existing GDSII files (i3.dummy_fill_gdsii) .
SPICE-Based Circuit Simulation
IPKISS now supports exporting SPICE netlists that can be loaded directly into the Caphe circuit simulator .
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Reproducible Input: Rerun simulations from a SPICE file without rebuilding the circuit in IPKISS code .
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Decoupled Runtime: SPICE-based simulation runs independently from the IPKISS runtime .
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What-If Analysis: Modify netlist parameters (e.g., bias voltages) after export for sweeps and simulations .
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EDA Interoperability: SPICE is a standard EDA format, enabling better integration with other tools .
Visual P&R Assistance
Enhanced visibility into component connections in PIC layouts. Connectors are now clearly identified by icons in the Layout Visualizer; clicking an icon allows interactive inspection of control points and reference coordinate systems .

