Siemens Solido Simulation Suite 2025: AI-Accelerated Custom IC Verification

The Solido Simulation Suite 2025 is Siemens EDA’s comprehensive, AI-powered solution for the simulation and verification of custom analog, mixed-signal, RF, and memory integrated circuits (ICs). It integrates advanced SPICE, FastSPICE, and mixed-signal simulators into a unified platform, leveraging AI to accelerate verification tasks for next-generation designs.

Key New Features & Capabilities

AI-Accelerated Verification

  • Order-of-Magnitude Speedup: The AI-driven Solido Sim AI and Solido LibSPICE can deliver significant reductions in simulation time. In a collaboration with Samsung Foundry, this technology enabled a 14x speedup in standard cell library verification by reducing the required simulation samples by 80% while maintaining high accuracy.

  • Automated Workflows: One-click automation replaces manual processes, transforming tasks like parameter sweeping into efficient, automated operations.

Advanced Simulation Technology

  • Solido SPICE: A next-generation, high-capacity SPICE simulator engineered for the demands of complex ICs. It offers 2 to 30 times faster simulation speeds without compromising on accuracy.

  • Foundry Certification: The Solido Simulation Suite is qualified for leading-edge process nodes. In 2025, Analog FastSPICE (AFS) and Solido SPICE achieved certification for TSMC’s N2P and A16 process nodes, meeting the foundry’s stringent accuracy requirements.

  • Comprehensive Analysis: Supports a full range of analyses including DC, transient, AC, noise, stability, RF (PSS/Harmonic Balance), and Monte Carlo simulations.

Integration & Use Cases

  • Seamless Workflow: The suite integrates with the Siemens Custom IC (CIC) environment, including tools like the S-Edit schematic editor and the Solido Design Environment.

  • Support for Advanced Designs: It is designed to handle complex challenges associated with analog, mixed-signal, RF, memory, and 3D IC architectures, making it suitable for a wide range of semiconductor designs.

  • Library & IP Verification: The suite plays a crucial role in verifying standard cell libraries and IP for SoC and system-level designs.